Using COTS Software to Reduce HPEC Complexity


EE Catalog, Military & Aerospace - November 2014
By: Chris A. Ciufo, Editor-in-Chief, Embedded; Extension Media

Coding for multi-processing HPEC sounds hard, but there are ways to save time and lower risk with slick COTS tools.

High-performance embedded computing (HPEC)—the kind that shrinks a super computer into an OpenVPX-sized rugged ATR box—solves the complex problems that power AESA radars, identify buried IEDs from 200 miles up, or extract one target voice from a hundred others. HPEC uses multi-threading, multi-tasking, multi-core real time computing that moves massive amounts of data between distributed nodes. Sometimes the nodes are heterogeneous, relying on different kinds of processors, programming models and architectures.

Yet the complex code to solve these complex problems can be greatly simplified using open standards like VSIPL and OpenCL, COTS processor features like Intel’s AVX instructions or Freescale’s AltiVec and some well-written middleware from GE Intelligent Platforms called AXIS. Comprised of three individual tools designed to work well together and with other industry software, AXIS saves designers time, lowers HPEC risk, extends legacy code in a slick and portable way and collectively lowers program costs.

Let’s take a look at the problems faced by HPEC designers and see how the three components of AXIS solve them.